HIT
HIERARCHICAL INTERCONNECTION TECHNOLOGY (H.I.T.)
FEATURES
Enables phased introduction of Surface Mount Technology - SMT.
Permits use of mixed technology - plated through hole (PTH) + SMT.
Simplifies handling and test.
Increases space utilization of available component area.
Provides a modular approach to design and manufacture.
Reduces equipment downtime by simplifying fault location.
An introduction TO H.I.T.
Advances in Surface Mount Technology (SMT), Very Large Scale Integration (VLSI), Tape Automated Bonding (TAB) and other comparable technologies has led to significant increases in packaging densities over recent years. With SMT for example, three fold increases in packing density can now be expected compared to conventional p.c.b. methods.
Whatever the merits of these advances, they can nevertheless present formidable difficulties not only in terms of assembly and diagnostic testing, but also reworking. Complexities aside, costs can be considerable.
Effects of these technologies in introducing sizeable increases in complexity, cost and test problems can often discourage any policy f standardizing on large p.c.b's. This can conflict with well established equipment practices such as those affecting equipment for which Double Eurocards are extensively used as an example. Moreover, in many industry sectors, adoption of total surface mount p.c.b's. can lead to unacceptable high levels of initial capital investment and engineering effort.
A controlled and phased introduction of SMT in parallel with conventional thru-hole solder technology therefore presents a more viable approach to these difficulties. As such it has led to the development of an entirely new interconnection system and equipment practice; Hierarchical Interconnection Technology or HIT.
The H.I.T. Concept
In effect, HIT produces framework for circuit board partitioning and modularization as well as solderless assembly of sub-units. At the same time, it also enables engineers to continue to base their designs on large boards and established equipment practices.
The system is based on circuit units that are intermediate in size between a conventional p.c.b. (Daughter Board) and chipcarrier. Units assume the form of small boards (Child Boards) that are 'socketed' into the HIT connector which is then parallel mounted onto the Daughter Board. The connector is also designed to be capable of using a variety of substrate materials. Thus single-sided, double-sided and multiplayer boards using glass-epoxy, metal clad laminates or ceramic substrates can all be accommodated.
This therefore permits the use of mixed technologies enabling the phased introduction of SMT into conventional technology. Similarly if redesign or updating is required, this can be confined to the module rather than involving the entire board.
The H.I.T. Contact
Two essential requirements which had to be met were (a) High reliability and (b) Low installed cost to satisfy these needs.
HIT uses two basic elements; a connector and a clamp. The connector consists of an insulator fitted with cantilever contacts with straight p.c. terminations. The clamp provides the contact pressure being secured by captive screws engaging captive threaded inserts in the insulator.
The contact system provides a small wiping action between the contact and the child board pad as the clamp is secured. The clamp is secured to a datum on the insulation such that a minimum contact pressure of 150g is achieved. Thus it is possible to avoid precious metal plating and use tin-lead, as a reliable gas-tight joint is achieved. Extensive testing, has provided this to be so even after the child board and connector have been subjected to 100 operations. A detailed Equipment Practice which includes data on thermal management, EMC etc is available on request.